In just under 5 years the Parallel Ultra Low Power (PULP) project led by the ETH Zurich and University of Bologna has been a huge success, providing high-quality, silicon-proven processing platforms based on the popular RISC-V ISA, under a permissible Solderpad license to many users both in the industry and academia.
On Sunday, 25th of February 2018, I will be in Vienna with a sizeable group from the PULP development team both from ETH Zurich and University of Bologna to host a workshop titled; “PULP: An open hardware platform, the story so far” as part of the 24th IEEE International Symposium on High-Performance Computer Architecture (HPCA-2018).
We will give talks on state of the open source hardware, present and future PULP platforms we are working on with a view on high-performance applications. Topics will include, transprecision concepts, our brand new 64-bit cores. Best of all we will be able to demonstrate these topics on various platforms including virtual platforms, actual ASICs, FPGA boards running multiple clusters of RISC-V cores and exchanging data with other processing nodes. The picture on the right shows our 64-bit Ariane RISC-V core booting Linux for example.
If you are planning to attend HPCA or are in Vienna on the 25th of February, this is a good opportunity to see what PULP can (and can not) do, get to talk to us, and maybe even score some of the cool PULP merchandise that we like so much 🙂