PULPino datasheet

This document contains the full documentation for the PULPino platform.

RI5CY core user manual

This document contains the full documentation for the RI5CY core.

RI5CY processor features
1 Custom toolchain based on GCC 5.2; Using -O3; RV32I + mul + custom instructions enabled
2 Custom toolchain based on GCC 5.2; Using -O3; RV32I + mul instruction
3 Custom toolchain based on GCC 5.2; Using -O3; RV32I
ISA Support RV32IMC
Interrupts Vectorized + Nested
Debug Run, Control, Inspect
Enhanced instructions MAC, ALU, Hardware Loops, Post-Increment LD/ST
Performance w/ extensions [CoreMark/MHz] 2.751
Performance RV32I + (M) [CoreMark/MHz] 2.542
Performance RV32I [CoreMark/MHz] 0.943
RI5CY processor implementation data
UMC 65nm, typical, 25°C, 1.2V
Gate Count [kG] 41.5
Floorplanned area [μm2] 60,000
Frequency [MHz] 654
Dynamic Power [μW/MHz] 30.21
Leakage Power [μW] 22.5

Presentation at the 4th RISC-V Workshop

Slides from RISC-V Workshop, 2016.

Presentation at the 3rd RISC-V Workshop

Slides / poster from RISC-V Workshop, 2016.

Presentation at ORCONF 2015

Slides from ORCONF, 2015.